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Building block of a programmable neuromorphic substrate: a digital neurosynaptic core

One of the main obstacles holding back the widespread utility of low-power neuromorphic chips is the lack of a consistent software-hardware neural programming model, where neuron parameters and connections can be learned off-line to perform a task in software with a guarantee that the same task will run on power-efficienthardware, the team said in an open-access paper. First aplication of neurosynaptic core: steering a simulated robot around a virtual racetrack -- a physics-based emulation of the real-life MobileRobots Pioneer 3-AT (P3AT), a four-wheel-drive robotic platform with a vision sensor (credit: J. Arthur et al./International Joint Conference on Neural Networks) The core is fully configurable in terms of neuron parameters, axon types, and synapse states and its fully digital implementation achieves one-to-one correspondence with software simulation models. One-to-one correspondence allows us to introduce an abstract neural programming model for our chip, a contract guaranteeing that any application developed in software functions identically in hardware.

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June 22, 2012 June 24, 2012 Kurzweilai MachineLearning Robots NewsFinder Text English HTML

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